Devices based on organic semiconductors can be inexpensive to fabricate. Such devices have promise for making very inexpensive electronic products. Organic devices have particular advantages over conventional silicon-based devices in large area devices (e.g. displays) or in moderate quantities (where the economies of scale offered by silicon fabrication are not available).
Many organic semiconductors are soluble in organic solvents. It is possible to deposit thin films of such materials (typically less than 1 μm in thickness) by various methods such as spin coating, inkjet printing, and micro stamping. Other organic semiconductors can be deposited by thermal evaporation in vacuum or single crystal growth methods.
Transistors are important components in various electronic circuits and integrated circuits. The Thin Film Transistor (TFT) structure is a common structure for making transistors that incorporate organic semiconductors. A TFT is a type of Isolated Gate Field Effect Transistor (IGFET) and its structure is very similar to that of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET). A TFT made of organic semiconductors is usually called an Organic FET or OFET.
FIG. 1 shows an OFET 10. OFET 10 is formed on a substrate 12 and comprises a gate electrode 14 separated from a semiconductor 15 by an insulating layer 16. Source and drain electrodes 17 and 18 are deposited on either side of a channel 19 in semiconductor 15. FIG. 1A shows an alternative OFET 10A which differ from OFET 10 primarily in that source 17 and drain 18 lie under semiconductor 15.
Since the mobility of one type of carrier (electron or hole) in organic semiconductors is usually much higher than the other, organic semiconductor devices can generally be considered to be single-carrier devices. OFETs typically work either in accumulation or depletion modes.
If applying a voltage to the gate causes accumulation of carriers at the semiconductor/insulator interface, the conductance between the drain and the source increases, which is referred to as the accumulation mode. In order to decrease the channel conductance the opposite voltage can be applied to the gate to repel carriers not only from the semiconductor/insulator interface but also from the bulk of the semiconductor. Switching between accumulation and depletion modes can be used in digital logic applications. OFETs produced by simple deposition methods such as inkjet printing and stamping have shown very poor molecular order at the semiconductor/insulator interface. Such OFETs have suffered from poor performance in accumulation mode, presumably because they exhibit very poor molecular order at the semiconductor/insulator interface. Poor molecular order results in low carrier mobility. OFETs that provide improved performance have been made by growing single crystals of small semiconductor organic molecules. However, single crystal growth is a very expensive fabrication method, which substantially increases the final product price.
Another problem with current OFETs is that switching a typical OFET from the accumulation mode to the depletion mode needs a large change in the gate voltage (usually more than 40 volts). The reason that such a wide range of voltage is needed relates to the conductivity of the bulk semiconductor at subthreshold voltages. In order to reduce the conductivity of the channel in the depletion mode, carriers have to be removed from the bulk semiconductor. This can be done by applying a voltage across the semiconductor. However a significant amount of the applied gate voltage is dropped across insulator 16. Because insulating layer 16 usually has a much smaller unit capacitance than does semiconductor 15, a relatively small electric field is present in the bulk of semiconductor 15 to push away the carriers.
The required gate voltage can be reduced by making insulating layer 16 thinner or by making insulating layer 16 of a high dielectric material. Both of these solutions greatly increase the cost of fabricating the OFET because they require advanced and complicated fabrication processes.
Another prior art device is a Metal Semiconductor Field Effect Transistor (MESFET). A MESFET works only in the depletion mode. The behavior of OFETs in the depletion mode can be modeled as a MESFET with an interfacial layer between gate and semiconductor: G. Horowitz, Organic Field-Effect Transistors, Adv. Mater 1998, 10, No. 5, pp. 365-377. It is known in the art that organic MESFETs provide inferior performance.
MESFETs based upon crystalline semiconductors, such as GaAs, are well known. FIG. 1B shows the structure of a conventional MESFET. A semiconductor 15 is located on top of an insulating substrate 12. Source 17 and drain 18 electrodes make Ohmic contacts to semiconductor 15. A gate electrode 14 is made from a material which can produce a Schottky contact with semiconductor 15. Since the gate is located between drain 17 and source 18, changing the voltage between gate 14 and source 17 can change the width of the depletion region produced by the Schottky contact. This changes the cross section of the conductive channel 19 between drain 17 and source 18. Consequently, modulating the gate-source voltage can modulate the drain current.
Since there is no insulating layer between gate and the semiconductor in the MESFET the gate voltage directly drops across the semiconductor, and so a smaller gate voltage is required in the MESFET in the depletion mode as compared to the OFET. Another advantage of the MESFET structure is that the characteristics of the transistor depend on the bulk properties of the semiconductor rather than the molecular structure of the interface with the gate.
MESFETs based on organic semiconductors are described in:    J. H. Schon, C. Kloc, Organic metal-semiconductor field-effect phototransistors, Appl. Phys. Lett. Vol. 78, No. 22, May 2001, pp. 3538-3540;    Lach et al., U.S. Pat. No. 6,603,141; and    Christensen, US patent application 2001/0045798.
A significant problem MESFETs based on organic/amorphous semiconductors is low transconductance and low conductance relative to transistors having the TFT structure. One of the effective parameters in conductance and transconductance is the channel length. Since in the conventional MESFET the gate is located between the drain and the source contacts, the channel length is equal to the sum of gate length, WG, the gap WGS between the gate and the source and the gap WGD between the gate and the drain.
Patents and applications that relate to transistors similar to those described above include:
U.S. Pat. No. 6,815,711 B2
U.S. Pat. No. 6,603,141 B2
US 2004/0061141 A1
US 2004/0155992 A1
US 2004/0018669 A1
US 2001/0045798 A1
EP 0 275 075 A2
EP 1 478 212 A1
WO 03/065466 and,
WO 2004/061906.
There is a need for transistors that can be fabricated inexpensively and yet offer performance acceptable for various applications.